Technical Field
The present technique relates to the field of data processing.
Technical Background
A data processing apparatus may have processing circuitry configured to execute instructions encoded according to a given instruction set architecture (ISA). The instructions may be represented using a given number of bits which are decoded to identify what processing operation should be performed and which registers are to be used during the processing operations. ISA design can be challenging because while there may be a large variety of processing operations which it might theoretically be desirable to support, increasing the number of bits in each instruction to accommodate additional operations tends to increase the circuit area and power consumption of processing devices executing instructions according to the ISA, because additional bits would need to be carried along the processing pipeline for each instruction, more complex decoding circuitry may be required, and the memory space required for storing a program in memory would increase with the size of the instructions. On the other hand, to save circuit area and energy, the number of bits in the instruction encoding can be limited to a certain number, but then this may require a compromise as to which operations are supported by the ISA.